? semiconductor components industries, llc, 2015 september, 2015 ? rev. 1 1 publication order number: 74lvc373a/d 74LVC573A low-voltage cmos octal transparent latch with 5 v?tolerant inputs and outputs (3?state, non?inverting) the 74LVC573A is a high performance, non?inverting octal transparent latch operating from a 1.2 to 3.6 v supply. high impedance ttl compatible inputs significantly reduce current loading to input drivers while ttl compatible outputs offer improved switching noise performance. a v i specification of 5.5 v allows 74LVC573A inputs to be safely driven from 5 v devices. the 74LVC573A contains 8 d?type latches with 3?state outputs. when the latch enable (le) input is high, data on the dn inputs enters the latches. in this condition, the latches are transparent, i.e., a latch output will change state each time its d input changes. when le is low, the latches store the information that was present on the d inputs a setup time preceding the high?to?low transition of le. the 3?state standard outputs are controlled by the output enable (oe ) input. when oe is low, the standard outputs are enabled. when oe is high, the standard outputs are in the high impedance state, but this does not interfere with new data entering into the latches. features ? designed for 1.2 to 3.6 v v cc operation ? 5 v tolerant ? interface capability with 5 v ttl logic ? supports live insertion and withdrawal ? i off specification guarantees high impedance when v cc = 0 v ? 24 ma output sink and source capability ? near zero static supply current in all three logic states (10 a) substantially reduces system power requirements ? esd performance: ? human body model >2000 v ? machine model >200 v ? these devices are pb?free, halogen free/bfr free and are rohs compliant 1 20 marking diagram a = assembly location l, wl = wafer lot y, yy = year w, ww = work week g or = pb?free package lcx 573a alyw tssop?20 dt suffix case 948e 1 20 see detailed ordering and shipping information on page 8 o f this data sheet. ordering information (note: microdot may be in either location) www. onsemi.com
74LVC573A www. onsemi.com 2 figure 1. pinout (top view) figure 2. logic diagram 19 20 18 17 16 15 14 2 1 34567 v cc 13 8 12 9 11 10 o0 o1 o2 o3 o4 o5 o6 o7 le oe d0 d1 d2 d3 d4 d5 d6 d7 gnd o0 d0 o1 d1 o2 d2 o3 d3 o4 d4 o5 d5 o6 d6 o7 d7 le q d le q d le q d le q d le q d le q d le q d le q d le oe 2 3 4 5 6 7 8 9 19 18 17 16 15 14 13 12 11 1 pin names function output enable input latch enable input data inputs 3?state latch outputs pins oe le d0?d7 o0?o7 truth table inputs outputs operating mode oe le dn on l l h h h l h l transparent (latch disabled); read latch l l l l h l h l latched (latch enabled) read latch l l x nc hold; read latch h l x z hold; disabled outputs h h h h h l z z transparent (latch disabled); disabled outputs h h l l h l z z latched (latch enabled); disabled outputs h = high voltage level h = high voltage level one setup time prior to the latch enable high?to?low transition l = low voltage level l = low voltage level one setup time prior to the latch enable high?to?low transition nc = no change, state prior to the latch enable high?to?low transition x = high or low voltage level or transitions are acceptable z = high impedance state for i cc reasons do not float inputs
74LVC573A www. onsemi.com 3 maximum ratings symbol parameter condition value unit v cc dc supply voltage ?0.5 to +6.5 v v i dc input voltage ?0.5 v i +6.5 v v o dc output voltage output in 3?state ?0.5 v o +6.5 v output in high or low state (note 1) ?0.5 v o v cc + 0.5 v i ik dc input diode current v i < gnd ?50 ma i ok dc output diode current v o < gnd ?50 ma v o > v cc +50 ma i o dc output source/sink current 50 ma i cc dc supply current per supply pin 100 ma i gnd dc ground current per ground pin 100 ma t stg storage temperature range ?65 to +150 c t l lead temperature, 1 mm from case for 10 seconds t l = 260 c t j junction temperature under bias t j = 135 c ja thermal resistance (note 2) 110.7 c/w msl moisture sensitivity level 1 stresses exceeding those listed in the maximum ratings table may damage the device. if any of these limits are exceeded, device function ality should not be assumed, damage may occur and reliability may be affected. 1. i o absolute maximum rating must be observed. 2. measured with minimum pad spacing on an fr4 board, using 10 mm?by?1 inch, 2 ounce copper trace no air flow. recommended operating conditions symbol parameter min typ max unit v cc supply voltage operating functional 1.65 1.2 3.6 3.6 v v i input voltage 0 5.5 v v o output voltage high or low state 3?state 0 0 v cc 5.5 v i oh high level output current v cc = 3.0 v ? 3.6 v v cc = 2.7 v ? 3.0 v ?24 ?12 ma i ol low level output current v cc = 3.0 v ? 3.6 v v cc = 2.7 v ? 3.0 v 24 12 ma t a operating free?air temperature ?40 +125 c t/ v input transition rise or fall rate, v cc = 1.65 to 2.7 v v cc = 2.7 to 3.6 v 0 0 20 10 ns/v functional operation above the stresses listed in the recommended operating ranges is not implied. extended exposure to stresse s beyond the recommended operating ranges limits may affect device reliability.
74LVC573A www. onsemi.com 4 dc electrical characteristics symbol parameter conditions ?40 to +85 c ?40 to +125 c unit min typ (note 3) max min typ (note 3) max v ih high?level input voltage v cc = 1.2 v 1.08 ? ? 1.08 ? ? v v cc = 1.65 v to 1.95 v 0.65 x v cc ? ? 0.65 x v cc ? ? v cc = 2.3 v to 2.7 v 1.7 ? ? 1.7 ? ? v cc = 2.7 v to 3.6 v 2.0 ? ? 2.0 ? ? v il low?level input voltage v cc = 1.2 v ? ? 0.12 ? ? 0.12 v v cc = 1.65 v to 1.95 v ? ? 0.35 x v cc ? ? 0.35 x v cc v cc = 2.3 v to 2.7 v ? ? 0.7 ? ? 0.7 v cc = 2.7 v to 3.6 v ? ? 0.8 ? ? 0.8 v oh high?level output voltage v i = v ih or v il v i o = ?100 a; v cc = 1.65 v to 3.6 v v cc ? 0.2 ? ? v cc ? 0.3 ? ? i o = ?4 ma; v cc = 1.65 v 1.2 ? ? 1.05 ? ? i o = ?8 ma; v cc = 2.3 v 1.8 ? ? 1.65 ? ? i o = ?12 ma; v cc = 2.7 v 2.2 ? ? 2.05 ? ? i o = ?18 ma; v cc = 3.0 v 2.4 ? ? 2.25 ? ? i o = ?24 ma; v cc = 3.0 v 2.2 ? ? 2.0 ? ? v ol low?level output voltage v i = v ih or v il v i o = 100 a; v cc = 1.65 v to 3.6 v ? ? 0.2 ? ? 0.3 i o = 4 ma; v cc = 1.65 v ? ? 0.45 ? ? 0.65 i o = 8 ma; v cc = 2.3 v ? ? 0.6 ? ? 0.8 i o = 12 ma; v cc = 2.7 v ? ? 0.4 ? ? 0.6 i o = 24 ma; v cc = 3.0 v ? ? 0.55 ? ? 0.8 i i input leakage current v i = 5.5 v or gnd; v cc = 3.6 v ? 0.1 5 ? 0.1 20 a i oz off?state output current vi = vih or vil; v o = 5.5 v or gnd; v cc = 3.6 v ? 0.1 5 ? 0.1 20 a i off power?off leakage current v i or v o = 5.5 v; v cc = 0.0 v ? 0.1 10 ? 0.1 20 a i cc supply current v i = v cc or gnd; i o = 0 a; v cc = 3.6 v ? 0.1 10 ? 0.1 40 a i cc additional supply current per input pin; v i = v cc ? 0.6 v; i o = 0 a; v cc = 2.7 v to 3.6 v ? 5 500 ? 5 5000 a product parametric performance is indicated in the electrical characteristics for the listed test conditions, unless otherwise noted. product performance may not be indicated by the electrical characteristics if operated under different conditions. 3. all typical values are measured at t a = 25 c and v cc = 3.3 v, unless stated otherwise.
74LVC573A www. onsemi.com 5 ac electrical characteristics (t r = t f = 2.5 ns) symbol parameter conditions ?40 to +85 c ?40 to +125 c unit min typ (note 4) max min typ (note 4) max t pd propagation delay (note 5) dn to on v cc = 1.2 v ? 16.0 ? ? ? ? ns v cc = 1.65 v to 1.95 v 2.1 7.8 16.3 2.1 ? 18.8 v cc = 2.3 v to 2.7 v 1.5 4.1 8.0 1.5 ? 9.2 v cc = 2.7 v 1.5 4.1 7.2 1.5 ? 9.0 v cc = 3.0 v to 3.6 v 1.5 3.4 6.2 1.5 ? 8.0 t pd propagation delay le to on v cc = 1.2 v ? 16.0 ? ? ? ? ns v cc = 1.65 v to 1.95 v 2.0 7.7 16.0 2.0 ? 18.4 v cc = 2.3 v to 2.7 v 1.5 4.1 7.8 1.5 ? 9.1 v cc = 2.7 v 1.5 3.7 7.5 1.5 ? 9.5 v cc = 3.0 v to 3.6 v 1.5 3.4 6.5 1.5 ? 8.5 t en enable time (note 6) oe to on v cc = 1.2 v ? 18.0 ? ? ? ? ns v cc = 1.65 v to 1.95 v 1.7 7.5 17.5 1.7 ? 20.2 v cc = 2.3 v to 2.7 v 1.5 4.2 9.2 1.5 ? 10.6 v cc = 2.7 v 1.5 4.2 8.5 1.5 ? 11.0 v cc = 3.0 v to 3.6 v 1.5 3.4 7.5 1.5 ? 9.5 t dis disable time (note 7) oe to on v cc = 1.2 v ? 8.0 ? ? ? ? ns ns v cc = 1.65 v to 1.95 v 1.0 3.3 10.1 1.0 ? 11.6 v cc = 2.3 v to 2.7 v 0.3 1.8 5.7 0.3 ? 6.6 v cc = 2.7 v 1.5 3.0 6.5 1.5 ? 8.5 v cc = 3.0 v to 3.6 v 1.5 2.5 6.0 1.5 ? 7.5 t w pulse width le high v cc = 1.65 v to 1.95 v 5.0 ? ? 5.0 ? ? ns ns v cc = 2.3 v to 2.7 v 4.0 ? ? 4.0 ? ? v cc = 2.7 v 3.2 ? ? 3.2 ? ? v cc = 3.0 v to 3.6 v 3.2 1.6 ? 3.2 ? ? t su set?up time dn to le v cc = 1.65 v to 1.95 v 4.0 ? ? 4.0 ? ? ns v cc = 2.3 v to 2.7 v 2.5 ? ? 2.5 ? ? v cc = 2.7 v 1.7 ? ? 1.7 ? ? v cc = 3.0 v to 3.6 v 1.7 ? ? 1.7 ? ? t h hold time dn to le v cc = 1.65 v to 1.95 v 3.0 ? ? 3.0 ? ? ns v cc = 2.3 v to 2.7 v 1.9 ? ? 1.9 ? ? v cc = 2.7 v 1.5 ? ? 1.5 ? ? v cc = 3.0 v to 3.6 v 1.4 ? ? 1.4 ? ? t sk(0) output skew time (note 8) ? ? 1.0 ? ? 1.5 ns product parametric performance is indicated in the electrical characteristics for the listed test conditions, unless otherwise noted. product performance may not be indicated by the electrical characteristics if operated under different conditions. 4. typical values are measured at t a = 25 c and v cc = 3.3 v, unless stated otherwise. 5. t pd is the same as t plh and t phl . 6. t en is the same as t pzl and t pzh . 7. t dis is the same as t plz and t phz . 8. skew between any two outputs of the same package switching in the same direction. this parameter is guaranteed by design.
74LVC573A www. onsemi.com 6 dynamic switching characteristics symbol characteristic condition t a = +25 c unit min typ max v olp dynamic low peak voltage (note 9) v cc = 3.3 v, c l = 50 pf, v ih = 3.3 v, v il = 0 v v cc = 2.5 v, c l = 30 pf, v ih = 2.5 v, v il = 0 v 0.8 0.6 v v olv dynamic low valley voltage (note 9) v cc = 3.3 v, c l = 50 pf, v ih = 3.3 v, v il = 0 v v cc = 2.5 v, c l = 30 pf, v ih = 2.5 v, v il = 0 v ?0.8 ?0.6 v 9. number of outputs defined as ?n?. measured with ?n?1? outputs switching from high?to?low or low?to?high. the remaining output is measured in the low state. capacitive characteristics symbol parameter condition typical unit c in input capacitance v cc = 3.3 v , v i = 0 v or v cc 5.0 pf c out output capacitance v cc = 3.3 v , v i = 0 v or v cc 6.0 pf c pd power dissipation capacitance (note 10) per flip?flop; v i = gnd or v cc pf v cc = 1.65 v to 1.95 v 7.1 v cc = 2.3 v to 2.7 v 10.3 v cc = 3.0 v to 3.6 v 13.2 10. c pd is used to determine the dynamic power dissipation (p d in w). p d c pd v cc 2 fi n c l v cc 2 fo where: fi = input frequency in mhz; fo = output frequency in mhz c l = output load capacitance in pf v cc = supply voltage in volts n = number of outputs switching (c l x v cc 2 x fo) = sum of the outputs
74LVC573A www. onsemi.com 7 figure 3. ac waveforms waveform 3 ? le to on propagation delays, le minimum pulse width, dn to le setup and hold times t r = t f = 2.5 ns, 10% to 90%; f = 1 mhz; t w = 500 ns except when noted 2.7 v 0 v dn le 1.5 v on 2.7 v 0 v v oh v ol t plh , t phl t w 1.5 v 1.5 v 1.5 v t h t s waveform 1 ? propagation delays t r = t f = 2.5 ns, 10% to 90%; f = 1 mhz; t w = 500 ns v cc 0 v v oh v ol dn t phl t plh vmi vmi vmo vmo on waveform 2 ? output enable and disable times t r = t f = 2.5 ns, 10% to 90%; f = 1 mhz; t w = 500 ns 0 v oe t pzh t phz t pzl t plz vmo vmo vmi v oh v hz v ol v cc v lz on on vmi symbol v cc 3.3 v 0.3 v 2.7 v v cc < 2.7 v vmi vmo v hz v lz 1.5 v 1.5 v v ol + 0.3 v v oh ? 0.3 v 1.5 v 1.5 v v ol + 0.3 v v oh ? 0.3 v v cc /2 v cc /2 v ol + 0.15 v v oh ? 015 v
74LVC573A www. onsemi.com 8 open pulse generator r t dut v cc r l r 1 c l 6 v gnd c l includes jig and probe capacitance r t = z out of pulse generator (typically 50 ) r 1 = r l supply voltage input load v ext v cc (v) v i t r , t f c l r l t plh , t phl t plz , t pzl t phz , t pzh 1.2 v cc 2 ns 30 pf 1 k open 2 x v cc gnd 1.65 ? 1.95 v cc 2 ns 30 pf 1 k open 2 x v cc gnd 2.3 ? 2.7 v cc 2 ns 30 pf 500 open 2 x v cc gnd 2.7 2.7 v 2.5 ns 50 pf 500 open 2 x v cc gnd 3.0 ? 3.6 2.7 v 2.5 ns 50 pf 500 open 2 x v cc gnd figure 4. test circuit ordering information device package shipping ? 74LVC573Adtr2g tssop?20 (pb?free) 2500 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
74LVC573A www. onsemi.com 9 package dimensions tssop?20 dt suffix case 948e?02 issue c dim a min max min max inches 6.60 0.260 millimeters b 4.30 4.50 0.169 0.177 c 1.20 0.047 d 0.05 0.15 0.002 0.006 f 0.50 0.75 0.020 0.030 g 0.65 bsc 0.026 bsc h 0.27 0.37 0.011 0.015 j 0.09 0.20 0.004 0.008 j1 0.09 0.16 0.004 0.006 k 0.19 0.30 0.007 0.012 k1 0.19 0.25 0.007 0.010 l 6.40 bsc 0.252 bsc m 0 8 0 8 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a does not include mold flash, protrusions or gate burrs. mold flash or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.25 (0.010) per side. 5. dimension k does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the k dimension at maximum material condition. 6. terminal numbers are shown for reference only. 7. dimension a and b are to be determined at datum plane ?w?. 110 11 20 pin 1 ident a b ?t? 0.100 (0.004) c d g h section n?n k k1 jj1 n n m f ?w? seating plane ?v? ?u? s u m 0.10 (0.004) v s t 20x ref k l l/2 2x s u 0.15 (0.006) t detail e 0.25 (0.010) detail e 6.40 0.252 --- --- s u 0.15 (0.006) t 7.06 16x 0.36 16x 1.26 0.65 dimensions: millimeters 1 pitch soldering footprint* *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d.
74LVC573A www. onsemi.com 10 on semiconductor and the are registered trademarks of semiconductor components industries, llc (scillc) or its subsidia ries in the united states and/or other countries. scillc owns the rights to a number of pa tents, trademarks, copyrights, trade secret s, and other intellectual property. a listin g of scillc?s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent?marking.pdf. scillc reserves the right to make changes without further notice to any product s herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any part icular purpose, nor does sci llc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typi cal? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating param eters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgic al implant into the body, or other applications intended to s upport or sustain life, or for any other application in which the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer s hall indemnify and hold scillc and its officers , employees, subsidiaries, affiliates, and dist ributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufac ture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. p ublication ordering information n. american technical support : 800?282?9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81?3?5817?1050 74LVC573A/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303?675?2175 or 800?344?3860 toll free usa/canada fax : 303?675?2176 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loc al sales representative
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